The present invention relates to temperature-compensated current sources, and more particularly, to the optimization of a current reference circuit providing temperature compensation for the generated current.
The possibility of obtaining transistors with practically identical characteristics has given rise to a new generation of current sources known as current mirrors. A rise in the temperature leads especially to the following results: an increase in the leakage currents of the transistors used in such current reference circuits, an increase in the stored charge, and an increase in gain, etc.
These phenomena, among others, involve a modification of the intrinsic characteristics of the transistors implemented in the current sources, resulting in the copied currents not being accurate. The current generated in such a current source is therefore dependent on the temperature variations. It is difficult to obtain a current reference source giving a constant current that is not sensitive to variations in temperature. To illustrate this phenomenon, referring now to FIG. 1, we shall look at the drawing of a standard prior art current source using complementary metal oxide semiconductor (CMOS) technology.
The prior art current source includes three arms: b1, b2 and b3. The middle arm b2 is a current reference arm whose role is to fix a reference current. The third arm b3 is an output arm in which the reference current Iref is copied. The role of the first arm b1 is to fix a reference voltage V1.
The current reference arm b2 comprises a first MOS transistor M2 whose source electrode is connected to a voltage supply terminal VDD, and whose gate electrode and drain electrode are connected to each other. The MOS transistor M2 therefore makes it possible to fix a reference current in the first and third arms b1 and b3.
The drain electrode of the first MOS transistor M2 is connected to the source electrode of a second MOS transistor M5, whose drain electrode is connected at a node N to the potential V2 grounded by a first resistor R1. The first resistor R1 is series-connected with a set of n parallel-connected elements Q2 enabling a voltage V3 to be fixed, with n being an integer at least equal to two. According to a preferred embodiment of the invention, each parallel-connected element Q2 is formed by a diode. More precisely, it is a MOS transistor whose parasitic bipolar effects are used to form the diode.
The output arm b3 of the current source includes a MOS transistor M3 whose source is connected to the power supply terminal VDD, and whose gate is connected to the gate of the MOS transistor M2 of the current reference arm b2. Thus, by copying the reference current fixed by the current reference arm (b2) into the current mirror M2, M3, the output current Iref of the current source is provided at the drain of the transistor M3.
The arm b1 of the current source comprises a first MOS transistor M1 whose source electrode is connected to the supply terminal VDD. The gate electrode of the transistor M1 is connected to the gate electrode of the transistor M2 of the current reference arm b2 of the current source, thus forming a second current mirror. The current generated in the current reference arm b2 is copied in the arm b1, and the currents flowing in the arm b1 and in the arm b2 are thus equal. The drain electrode of the MOS transistor M1 is connected to the source electrode of a second MOS transistor M4, whose gate electrode is connected to the gate electrode of the MOS transistor M5 of the current reference arm b2. Furthermore, the gate electrode of the transistor M4 is connected to its source electrode.
Finally, the drain electrode of the transistor M4 is grounded by an element Q1 that is used to fix the voltage V1, and is identical to each of the n parallel-connected elements Q2 of the arm b2. Thus, according to a preferred embodiment, Q1 is a MOS transistor whose stray bipolar effects are used to form a diode.
The MOS transistors M4 and M5 make it possible for the first and second arms to be symmetrical, respectively b1 and b2, and form a voltage copying circuit which permits the copying of the reference voltage V1 fixed by the diode Q1 at the node N at the potential V2 of the arm b2, so that V2=V1.
The configuration of the MOS transistors M1, M2, M4 and M5 as described above therefore makes it possible to obtain equal currents I1 and I2 respectively flowing in the arms b1 and b2 of the current source, as well as equal voltages V1 and V2, according to a well-known principle of operation that needs no detailed description herein.
Consequently, the difference in potential xcex94V at the terminals of the resistor R1 may be expressed as follows:                               Δ          ⁢                      xe2x80x83                    ⁢          V                =                  xe2x80x83                ⁢                  V2          -          V3                                        =                  xe2x80x83                ⁢                  V1          -          V3                    
According to a standard equation governing operation of the bipolar transistors, we have:
V1=VT*ln(I1/Is1), and 
V3=VT*ln(I2/n*Is2) 
Is1 and Is2 are the saturation currents of the diode-mounted transistors Q1 and Q2, and VT is the thermal voltage which physically corresponds to the ratio between the coefficient of diffusion of the charges and the mobility of the charges, and can be expressed as follows:   VT  =            k      *      T        q  
The variable k is Boltzman""s constant, T is the temperature (in degrees Kelvin) and q is the elementary charge.
Numerically, k=1,381*10xe2x88x9223 J*Kxe2x88x921 (Joules per Kelvin) and q=1,602*10xe2x88x9219 C (coulombs). Consequently:       Δ    ⁢          xe2x80x83        ⁢    V    =                    k        *        T        *        ln            q        ⁡          [                        I1          Is1                *                              n            *            Is2                    I2                    ]      
The diode-mounted transistors Q1 and Q2 are advantageously designed to be identical so as to present the same physical properties, hence Is1=Is2. Furthermore, we have already seen above that, by current copying, the currents I1 and I2 are identical. The potential difference xcex94V at the terminals of the resistor R1 can then be expressed as follows:       Δ    ⁢          xe2x80x83        ⁢    V    =                    k        *        T            q        *          ln      ⁢              (        n        )            
The current I2, generated by the potential difference xcex94V at the terminals of the resistor R1 and flowing through the arm b2, is expressed conventionally by the following relationship:   I2  =            Δ      ⁢              xe2x80x83            ⁢      V        R1  
Now, by copying the current in the MOS transistor M3, the currents Iref and I2 are identical. Consequently:                     Iref        =                                            k              *              T                        q                    *                                    ln              ⁡                              (                n                )                                      /            R1                                              (        1        )            
Here we can understand the value of placing n transistors Q2 in parallel since, without this characteristic and through simplifying the equations, the output current Iref of the current reference source would be theoretically zero.
The above relationship (1) clearly shows that the current Iref varies linearly with the temperature T (in the ideal case where the value of the resistor R1 does not vary with the temperature), and the variation of the current Iref as a function of the temperature is expressed according to the following expression:             δ      ⁢              xe2x80x83            ⁢      Iref              δ      ⁢              xe2x80x83            ⁢      T        =            k      q        *                  ln        ⁢                  (          n          )                    /      R1      
A prior art current source of this kind therefore raises a problem of stability of the reference current given in relation to the temperature. This aspect may prove to be an inherent defect in many applications.
An object of the present invention is to overcome the drawbacks of the prior art by improving the current sources of the type described in FIG. 1 so that the given reference current is independent of the temperature.
This and other objects, advantages and features according to the present invention are provided by implementation of a current reference circuit whose temperature-related stability depends directly on a ratio of resistances, enabling compensation for the temperature-related variations in the reference current based upon the respective resistance values.
The invention therefore relates to a temperature-compensated current source comprising a first arm fixing a reference voltage by using a diode, a second arm fixing a reference current, and a third arm providing a temperature-stable output current. The temperature-stable output current is obtained by copying, in a first current mirror, the current fixed by the second current reference arm.
A second current mirror is designed for copying, in the first voltage reference arm, the current fixed by the second current reference arm, while a voltage copying circuit copies the reference voltage fixed by the first arm at the level of a node of the second arm connected to ground by a first resistor.
The first resistor is series-connected with n parallel-connected diodes. The current source is characterized in that the second current reference arm furthermore comprises a second resistor parallel-connected with the assembly formed by the first resistor series-connected with the n parallel-connected diodes so that the variations of the reference current are compensated based upon the respective values of the first and second resistors.